1. Field of the Invention
The present invention relates to a liquid crystal display device, and more particularly, to a technology effectively applied to a liquid crystal display device that has a liquid crystal display panel with fine pixel dimensions.
2. Description of the Related Art
A liquid crystal display device is composed of a pair of substrates (for example, glass substrates) and a liquid crystal composition sealed in a gap between the substrates. Specifically, in the case of an in-plane switching (IPS) liquid crystal display device, for example, thin film transistors with amorphous silicon or other semiconductor layers, pixel electrodes, signal lines, scanning lines, gate electrodes, counter electrodes, and the like are formed on one of the substrates (hereinafter, referred to as TFT substrate), whereas a light shielding film, a color filter, and the like are formed on the other substrate (hereinafter, referred to as CF substrate). The TFT substrate and the CF substrate are arranged to face each other across a predetermined interval, which is kept by a spacer, and are sealed with a sealant. A liquid crystal composition is sealed between the substrates.
Pixels in a common liquid crystal display device each have a storage capacitor. The storage capacitor is used mainly to prevent feed-through voltage caused by a voltage change in the scanning line or the signal line from affecting the voltage of the pixel electrode during a hold period in which the thin film transistor is off.
The storage capacitor is implemented by, for example, the following four structures:
(1) Upper layer transparent pixel electrode/insulating film/lower layer transparent storage capacitor electrode.
(2) Upper layer transparent pixel electrode/insulating film/lower layer metal storage capacitor electrode.
(3) Upper layer metal source (or drain) electrode/insulating film/lower layer metal storage capacitor electrode.
(4) Upper layer metal source (or drain) electrode/insulating film/intermediate metal storage capacitor electrode/insulating film/lower layer polycrystalline silicon source (or drain) electrode.
The above-mentioned structure (1) is described in, for example, JP 08-179363 A, and the above-mentioned structure (4) is described in, for example, JP 2000-180900 A.